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608 lines
16 KiB
608 lines
16 KiB
4 years ago
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/*
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SPI.cpp - SPI library for esp8266
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Copyright (c) 2015 Hristo Gochkov. All rights reserved.
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This file is part of the esp8266 core for Arduino environment.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "SPI.h"
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#include "HardwareSerial.h"
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#define SPI_PINS_HSPI 0 // Normal HSPI mode (MISO = GPIO12, MOSI = GPIO13, SCLK = GPIO14);
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#define SPI_PINS_HSPI_OVERLAP 1 // HSPI Overllaped in spi0 pins (MISO = SD0, MOSI = SDD1, SCLK = CLK);
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#define SPI_OVERLAP_SS 0
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typedef union {
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uint32_t regValue;
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struct {
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unsigned regL :6;
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unsigned regH :6;
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unsigned regN :6;
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unsigned regPre :13;
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unsigned regEQU :1;
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};
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} spiClk_t;
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SPIClass::SPIClass() {
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useHwCs = false;
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pinSet = SPI_PINS_HSPI;
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}
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bool SPIClass::pins(int8_t sck, int8_t miso, int8_t mosi, int8_t ss)
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{
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if (sck == 6 &&
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miso == 7 &&
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mosi == 8 &&
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ss == 0) {
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pinSet = SPI_PINS_HSPI_OVERLAP;
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} else if (sck == 14 &&
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miso == 12 &&
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mosi == 13) {
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pinSet = SPI_PINS_HSPI;
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} else {
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return false;
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}
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return true;
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}
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void SPIClass::begin() {
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switch (pinSet) {
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case SPI_PINS_HSPI_OVERLAP:
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IOSWAP |= (1 << IOSWAP2CS);
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//SPI0E3 |= 0x1; This is in the MP3_DECODER example, but makes the WD kick in here.
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SPI1E3 |= 0x3;
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setHwCs(true);
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break;
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case SPI_PINS_HSPI:
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default:
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pinMode(SCK, SPECIAL); ///< GPIO14
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pinMode(MISO, SPECIAL); ///< GPIO12
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pinMode(MOSI, SPECIAL); ///< GPIO13
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break;
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}
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SPI1C = 0;
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setFrequency(1000000); ///< 1MHz
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SPI1U = SPIUMOSI | SPIUDUPLEX | SPIUSSE;
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SPI1U1 = (7 << SPILMOSI) | (7 << SPILMISO);
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SPI1C1 = 0;
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}
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void SPIClass::end() {
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switch (pinSet) {
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case SPI_PINS_HSPI:
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pinMode(SCK, INPUT);
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pinMode(MISO, INPUT);
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pinMode(MOSI, INPUT);
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if (useHwCs) {
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pinMode(SS, INPUT);
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}
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break;
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case SPI_PINS_HSPI_OVERLAP:
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IOSWAP &= ~(1 << IOSWAP2CS);
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if (useHwCs) {
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SPI1P |= SPIPCS1DIS | SPIPCS0DIS | SPIPCS2DIS;
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pinMode(SPI_OVERLAP_SS, INPUT);
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}
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break;
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}
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}
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void SPIClass::setHwCs(bool use) {
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switch (pinSet) {
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case SPI_PINS_HSPI:
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if (use) {
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pinMode(SS, SPECIAL); ///< GPIO15
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SPI1U |= (SPIUCSSETUP | SPIUCSHOLD);
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} else {
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if (useHwCs) {
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pinMode(SS, INPUT);
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SPI1U &= ~(SPIUCSSETUP | SPIUCSHOLD);
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}
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}
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break;
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case SPI_PINS_HSPI_OVERLAP:
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if (use) {
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pinMode(SPI_OVERLAP_SS, FUNCTION_1); // GPI0 to SPICS2 mode
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SPI1P &= ~SPIPCS2DIS;
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SPI1P |= SPIPCS1DIS | SPIPCS0DIS;
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SPI1U |= (SPIUCSSETUP | SPIUCSHOLD);
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}
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else {
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if (useHwCs) {
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pinMode(SPI_OVERLAP_SS, INPUT);
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SPI1P |= SPIPCS1DIS | SPIPCS0DIS | SPIPCS2DIS;
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SPI1U &= ~(SPIUCSSETUP | SPIUCSHOLD);
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}
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}
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break;
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}
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useHwCs = use;
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}
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void SPIClass::beginTransaction(SPISettings settings) {
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while(SPI1CMD & SPIBUSY) {}
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setFrequency(settings._clock);
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setBitOrder(settings._bitOrder);
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setDataMode(settings._dataMode);
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}
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void SPIClass::endTransaction() {
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}
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void SPIClass::setDataMode(uint8_t dataMode) {
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/**
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SPI_MODE0 0x00 - CPOL: 0 CPHA: 0
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SPI_MODE1 0x01 - CPOL: 0 CPHA: 1
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SPI_MODE2 0x10 - CPOL: 1 CPHA: 0
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SPI_MODE3 0x11 - CPOL: 1 CPHA: 1
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*/
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bool CPOL = (dataMode & 0x10); ///< CPOL (Clock Polarity)
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bool CPHA = (dataMode & 0x01); ///< CPHA (Clock Phase)
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if(CPHA) {
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SPI1U |= (SPIUSME);
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} else {
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SPI1U &= ~(SPIUSME);
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}
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if(CPOL) {
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SPI1P |= 1<<29;
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} else {
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SPI1P &= ~(1<<29);
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//todo test whether it is correct to set CPOL like this.
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}
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}
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void SPIClass::setBitOrder(uint8_t bitOrder) {
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if(bitOrder == MSBFIRST) {
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SPI1C &= ~(SPICWBO | SPICRBO);
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} else {
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SPI1C |= (SPICWBO | SPICRBO);
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}
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}
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/**
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* calculate the Frequency based on the register value
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* @param reg
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* @return
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*/
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static uint32_t ClkRegToFreq(spiClk_t * reg) {
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return (ESP8266_CLOCK / ((reg->regPre + 1) * (reg->regN + 1)));
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}
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void SPIClass::setFrequency(uint32_t freq) {
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static uint32_t lastSetFrequency = 0;
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static uint32_t lastSetRegister = 0;
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if(freq >= ESP8266_CLOCK) {
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setClockDivider(0x80000000);
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return;
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}
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if(lastSetFrequency == freq && lastSetRegister == SPI1CLK) {
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// do nothing (speed optimization)
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return;
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}
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const spiClk_t minFreqReg = { 0x7FFFF000 };
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uint32_t minFreq = ClkRegToFreq((spiClk_t*) &minFreqReg);
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if(freq < minFreq) {
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// use minimum possible clock
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setClockDivider(minFreqReg.regValue);
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lastSetRegister = SPI1CLK;
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lastSetFrequency = freq;
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return;
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}
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uint8_t calN = 1;
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spiClk_t bestReg = { 0 };
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int32_t bestFreq = 0;
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// find the best match
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while(calN <= 0x3F) { // 0x3F max for N
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spiClk_t reg = { 0 };
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int32_t calFreq;
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int32_t calPre;
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int8_t calPreVari = -2;
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reg.regN = calN;
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while(calPreVari++ <= 1) { // test different variants for Pre (we calculate in int so we miss the decimals, testing is the easyest and fastest way)
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calPre = (((ESP8266_CLOCK / (reg.regN + 1)) / freq) - 1) + calPreVari;
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if(calPre > 0x1FFF) {
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reg.regPre = 0x1FFF; // 8191
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} else if(calPre <= 0) {
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reg.regPre = 0;
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} else {
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reg.regPre = calPre;
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}
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reg.regL = ((reg.regN + 1) / 2);
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// reg.regH = (reg.regN - reg.regL);
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// test calculation
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calFreq = ClkRegToFreq(®);
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//os_printf("-----[0x%08X][%d]\t EQU: %d\t Pre: %d\t N: %d\t H: %d\t L: %d = %d\n", reg.regValue, freq, reg.regEQU, reg.regPre, reg.regN, reg.regH, reg.regL, calFreq);
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if(calFreq == (int32_t) freq) {
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// accurate match use it!
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memcpy(&bestReg, ®, sizeof(bestReg));
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break;
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} else if(calFreq < (int32_t) freq) {
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// never go over the requested frequency
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if(abs(freq - calFreq) < abs(freq - bestFreq)) {
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bestFreq = calFreq;
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memcpy(&bestReg, ®, sizeof(bestReg));
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}
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}
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}
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if(calFreq == (int32_t) freq) {
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// accurate match use it!
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break;
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}
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calN++;
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}
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// os_printf("[0x%08X][%d]\t EQU: %d\t Pre: %d\t N: %d\t H: %d\t L: %d\t - Real Frequency: %d\n", bestReg.regValue, freq, bestReg.regEQU, bestReg.regPre, bestReg.regN, bestReg.regH, bestReg.regL, ClkRegToFreq(&bestReg));
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setClockDivider(bestReg.regValue);
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lastSetRegister = SPI1CLK;
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lastSetFrequency = freq;
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}
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void SPIClass::setClockDivider(uint32_t clockDiv) {
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if(clockDiv == 0x80000000) {
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GPMUX |= (1 << 9); // Set bit 9 if sysclock required
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} else {
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GPMUX &= ~(1 << 9);
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}
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SPI1CLK = clockDiv;
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}
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inline void SPIClass::setDataBits(uint16_t bits) {
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const uint32_t mask = ~((SPIMMOSI << SPILMOSI) | (SPIMMISO << SPILMISO));
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bits--;
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SPI1U1 = ((SPI1U1 & mask) | ((bits << SPILMOSI) | (bits << SPILMISO)));
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}
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uint8_t SPIClass::transfer(uint8_t data) {
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while(SPI1CMD & SPIBUSY) {}
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// reset to 8Bit mode
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setDataBits(8);
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SPI1W0 = data;
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SPI1CMD |= SPIBUSY;
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while(SPI1CMD & SPIBUSY) {}
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return (uint8_t) (SPI1W0 & 0xff);
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}
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uint16_t SPIClass::transfer16(uint16_t data) {
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union {
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uint16_t val;
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struct {
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uint8_t lsb;
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uint8_t msb;
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};
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} in, out;
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in.val = data;
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if((SPI1C & (SPICWBO | SPICRBO))) {
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//LSBFIRST
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out.lsb = transfer(in.lsb);
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out.msb = transfer(in.msb);
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} else {
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//MSBFIRST
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out.msb = transfer(in.msb);
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out.lsb = transfer(in.lsb);
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}
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return out.val;
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}
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void SPIClass::transfer(void *buf, uint16_t count) {
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uint8_t *cbuf = reinterpret_cast<uint8_t*>(buf);
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// cbuf may not be 32bits-aligned
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for (; (((unsigned long)cbuf) & 3) && count; cbuf++, count--)
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*cbuf = transfer(*cbuf);
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// cbuf is now aligned
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// count may not be a multiple of 4
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uint16_t count4 = count & ~3;
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transferBytes(cbuf, cbuf, count4);
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// finish the last <4 bytes
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cbuf += count4;
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count -= count4;
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for (; count; cbuf++, count--)
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*cbuf = transfer(*cbuf);
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}
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void SPIClass::write(uint8_t data) {
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while(SPI1CMD & SPIBUSY) {}
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// reset to 8Bit mode
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setDataBits(8);
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SPI1W0 = data;
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SPI1CMD |= SPIBUSY;
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while(SPI1CMD & SPIBUSY) {}
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}
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void SPIClass::write16(uint16_t data) {
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write16(data, !(SPI1C & (SPICWBO | SPICRBO)));
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}
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void SPIClass::write16(uint16_t data, bool msb) {
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while(SPI1CMD & SPIBUSY) {}
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// Set to 16Bits transfer
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setDataBits(16);
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if(msb) {
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// MSBFIRST Byte first
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SPI1W0 = (data >> 8) | (data << 8);
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} else {
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// LSBFIRST Byte first
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SPI1W0 = data;
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}
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SPI1CMD |= SPIBUSY;
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while(SPI1CMD & SPIBUSY) {}
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}
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void SPIClass::write32(uint32_t data) {
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write32(data, !(SPI1C & (SPICWBO | SPICRBO)));
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}
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void SPIClass::write32(uint32_t data, bool msb) {
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while(SPI1CMD & SPIBUSY) {}
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// Set to 32Bits transfer
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setDataBits(32);
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if(msb) {
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union {
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uint32_t l;
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uint8_t b[4];
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} data_;
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data_.l = data;
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// MSBFIRST Byte first
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data = (data_.b[3] | (data_.b[2] << 8) | (data_.b[1] << 16) | (data_.b[0] << 24));
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}
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SPI1W0 = data;
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SPI1CMD |= SPIBUSY;
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while(SPI1CMD & SPIBUSY) {}
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}
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/**
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* Note:
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* data need to be aligned to 32Bit
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* or you get an Fatal exception (9)
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* @param data uint8_t *
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* @param size uint32_t
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*/
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void SPIClass::writeBytes(const uint8_t * data, uint32_t size) {
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while(size) {
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if(size > 64) {
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writeBytes_(data, 64);
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size -= 64;
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data += 64;
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} else {
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writeBytes_(data, size);
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size = 0;
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}
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}
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}
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void SPIClass::writeBytes_(const uint8_t * data, uint8_t size) {
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while(SPI1CMD & SPIBUSY) {}
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// Set Bits to transfer
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setDataBits(size * 8);
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uint32_t * fifoPtr = (uint32_t*)&SPI1W0;
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const uint32_t * dataPtr = (uint32_t*) data;
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uint32_t dataSize = ((size + 3) / 4);
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while(dataSize--) {
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*fifoPtr = *dataPtr;
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dataPtr++;
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fifoPtr++;
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}
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__sync_synchronize();
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SPI1CMD |= SPIBUSY;
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while(SPI1CMD & SPIBUSY) {}
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}
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/**
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||
|
* @param data uint8_t *
|
||
|
* @param size uint8_t max for size is 64Byte
|
||
|
* @param repeat uint32_t
|
||
|
*/
|
||
|
void SPIClass::writePattern(const uint8_t * data, uint8_t size, uint32_t repeat) {
|
||
|
if(size > 64) return; //max Hardware FIFO
|
||
|
|
||
|
while(SPI1CMD & SPIBUSY) {}
|
||
|
|
||
|
uint32_t buffer[16];
|
||
|
uint8_t *bufferPtr=(uint8_t *)&buffer;
|
||
|
const uint8_t *dataPtr = data;
|
||
|
volatile uint32_t * fifoPtr = &SPI1W0;
|
||
|
uint8_t r;
|
||
|
uint32_t repeatRem;
|
||
|
uint8_t i;
|
||
|
|
||
|
if((repeat * size) <= 64){
|
||
|
repeatRem = repeat * size;
|
||
|
r = repeat;
|
||
|
while(r--){
|
||
|
dataPtr = data;
|
||
|
for(i=0; i<size; i++){
|
||
|
*bufferPtr = *dataPtr;
|
||
|
bufferPtr++;
|
||
|
dataPtr++;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
r = repeatRem;
|
||
|
if(r & 3) r = r / 4 + 1;
|
||
|
else r = r / 4;
|
||
|
for(i=0; i<r; i++){
|
||
|
*fifoPtr = buffer[i];
|
||
|
fifoPtr++;
|
||
|
}
|
||
|
SPI1U = SPIUMOSI | SPIUSSE;
|
||
|
} else {
|
||
|
//Orig
|
||
|
r = 64 / size;
|
||
|
repeatRem = repeat % r * size;
|
||
|
repeat = repeat / r;
|
||
|
|
||
|
while(r--){
|
||
|
dataPtr = data;
|
||
|
for(i=0; i<size; i++){
|
||
|
*bufferPtr = *dataPtr;
|
||
|
bufferPtr++;
|
||
|
dataPtr++;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
//Fill fifo with data
|
||
|
for(i=0; i<16; i++){
|
||
|
*fifoPtr = buffer[i];
|
||
|
fifoPtr++;
|
||
|
}
|
||
|
|
||
|
r = 64 / size;
|
||
|
|
||
|
SPI1U = SPIUMOSI | SPIUSSE;
|
||
|
setDataBits(r * size * 8);
|
||
|
while(repeat--){
|
||
|
SPI1CMD |= SPIBUSY;
|
||
|
while(SPI1CMD & SPIBUSY) {}
|
||
|
}
|
||
|
}
|
||
|
//End orig
|
||
|
setDataBits(repeatRem * 8);
|
||
|
SPI1CMD |= SPIBUSY;
|
||
|
while(SPI1CMD & SPIBUSY) {}
|
||
|
|
||
|
SPI1U = SPIUMOSI | SPIUDUPLEX | SPIUSSE;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @param out uint8_t *
|
||
|
* @param in uint8_t *
|
||
|
* @param size uint32_t
|
||
|
*/
|
||
|
void SPIClass::transferBytes(const uint8_t * out, uint8_t * in, uint32_t size) {
|
||
|
while(size) {
|
||
|
if(size > 64) {
|
||
|
transferBytes_(out, in, 64);
|
||
|
size -= 64;
|
||
|
if(out) out += 64;
|
||
|
if(in) in += 64;
|
||
|
} else {
|
||
|
transferBytes_(out, in, size);
|
||
|
size = 0;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* Note:
|
||
|
* in and out need to be aligned to 32Bit
|
||
|
* or you get an Fatal exception (9)
|
||
|
* @param out uint8_t *
|
||
|
* @param in uint8_t *
|
||
|
* @param size uint8_t (max 64)
|
||
|
*/
|
||
|
|
||
|
void SPIClass::transferBytesAligned_(const uint8_t * out, uint8_t * in, uint8_t size) {
|
||
|
if (!size)
|
||
|
return;
|
||
|
|
||
|
while(SPI1CMD & SPIBUSY) {}
|
||
|
// Set in/out Bits to transfer
|
||
|
|
||
|
setDataBits(size * 8);
|
||
|
|
||
|
volatile uint32_t *fifoPtr = &SPI1W0;
|
||
|
|
||
|
if (out) {
|
||
|
uint8_t outSize = ((size + 3) / 4);
|
||
|
uint32_t *dataPtr = (uint32_t*) out;
|
||
|
while (outSize--) {
|
||
|
*(fifoPtr++) = *(dataPtr++);
|
||
|
}
|
||
|
} else {
|
||
|
uint8_t outSize = ((size + 3) / 4);
|
||
|
// no out data only read fill with dummy data!
|
||
|
while (outSize--) {
|
||
|
*(fifoPtr++) = 0xFFFFFFFF;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
SPI1CMD |= SPIBUSY;
|
||
|
while(SPI1CMD & SPIBUSY) {}
|
||
|
|
||
|
if (in) {
|
||
|
uint32_t *dataPtr = (uint32_t*) in;
|
||
|
fifoPtr = &SPI1W0;
|
||
|
int inSize = size;
|
||
|
// Unlike outSize above, inSize tracks *bytes* since we must transfer only the requested bytes to the app to avoid overwriting other vars.
|
||
|
while (inSize >= 4) {
|
||
|
*(dataPtr++) = *(fifoPtr++);
|
||
|
inSize -= 4;
|
||
|
in += 4;
|
||
|
}
|
||
|
volatile uint8_t *fifoPtrB = (volatile uint8_t *)fifoPtr;
|
||
|
while (inSize--) {
|
||
|
*(in++) = *(fifoPtrB++);
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
void SPIClass::transferBytes_(const uint8_t * out, uint8_t * in, uint8_t size) {
|
||
|
if (!((uint32_t)out & 3) && !((uint32_t)in & 3)) {
|
||
|
// Input and output are both 32b aligned or NULL
|
||
|
transferBytesAligned_(out, in, size);
|
||
|
} else {
|
||
|
// HW FIFO has 64b limit and ::transferBytes breaks up large xfers into 64byte chunks before calling this function
|
||
|
// We know at this point at least one direction is misaligned, so use temporary buffer to align everything
|
||
|
// No need for separate out and in aligned copies, we can overwrite our out copy with the input data safely
|
||
|
uint8_t aligned[64]; // Stack vars will be 32b aligned
|
||
|
if (out) {
|
||
|
memcpy(aligned, out, size);
|
||
|
}
|
||
|
transferBytesAligned_(out ? aligned : nullptr, in ? aligned : nullptr, size);
|
||
|
if (in) {
|
||
|
memcpy(in, aligned, size);
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
#if !defined(NO_GLOBAL_INSTANCES) && !defined(NO_GLOBAL_SPI)
|
||
|
SPIClass SPI;
|
||
|
#endif
|